1. Field of the Invention
The present invention relates to electrical and electronic circuits and systems. More specifically, the present invention relates to systems and methods for mitigating single event upset in digital circuits.
2. Description of the Related Art
Particulate radiation (such as energetic electrons, protons, or ions) in space and airborne environments can cause errors to occur in digital circuits. A single event upset (SEU) is an error that occurs when an energy particle strikes a sensitive node in the circuit and causes a logic level to change state to an opposite value. SEU is an increasing problem in space—and even critical terrestrial—applications, since evolving digital technologies are of ever-smaller features sizes, and smaller feature-sized technology is more susceptible to upset by radiation. In order to use these technologies, methods must be provided to mitigate upset.
A common approach to mitigating these upsets is to use redundancy techniques such as triple modular redundancy (TMR), in which the circuit is duplicated to provide three identical circuits, the outputs of which are then processed by a voter. The voter selects the output that is held in the majority of the circuits. Thus, if one of the three circuits is upset, the other two circuits will mask the error.
This approach works well for circuits that are clocking and updating continuously so that the probability of upsets occurring in more than one redundant circuit is low. If, however, the circuits are not being loaded frequently enough (common with some storage elements such as flip-flops), upsets may accumulate. The total number of upsets that can be mitigated is limited by the quantity of redundant information (TMR, for example, can handle only one upset). Over time, enough upsets can accumulate in the mitigated circuit to saturate the redundancy scheme, resulting in a functional error (e.g., two of the three circuits in a TMR scheme may become upset, causing the voter to select the wrong output).
The standard solution to this problem of upset accumulation is “scrubbing” the storage elements at a frequency high enough to reduce the probability of redundancy saturation to an acceptable level. Scrubbing involves periodically rewriting the correct state to each circuit. The rate at which the circuits are rewritten is chosen to be faster than upsets will accumulate (typically several times a day, depending on the application and environmental conditions). Increasing the scrubbing rate will reduce the probability of a functional error caused by redundancy saturation; however, it will also increase power consumption and consume bandwidth (since scrubbed resources are not available during scrubbing cycles). This can be problematic for power sensitive applications such as space applications.
Hence, a need exists in the art for an improved system or method for mitigating single event upset accumulation that offers lower power and bandwidth consumption than prior approaches.